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For information about the Australian regulator, see Australian Securities and Investments Commission
An application-specific integrated circuit or ASIC comprises an integrated circuit (IC) with functionality customised for a particular use (equipment or project), rather than serving for general-purpose use. For example, a chip designed solely to run a cash register is an ASIC. In contrast, a microprocessor is not application-specific, because users can adapt it to many purposes.
The initial ASICs used gate-array technology.
The British firm Ferranti produced perhaps the first gate-array, the ULA (Uncommitted Logic Array), around 1980. Customisation occurred by varying the metal interconnect mask. ULAs had complexities of up to a few thousand gates. Later versions became more generalized, with different base dies customised by both metal and polysilicon layers. Some base dies include RAM elements.
In the late 1980s, the availability of logic synthesis tools (such as Design Compiler) that could accept hardware description language descriptions using Verilog and VHDL and compile a high-level description into to an optimised gate level netlist brought "standard-cell" design into the fore-front. A standard-cell library consists of pre-characterized collections of gates (such as 2 input nor, 2 input nand, invertors, etc.) that the silicon compiler uses to translate the original source into a gate level netlist. This netlist is fed into a place and route tool to create a physical layout. Routing applications then place the pre-characterized cells in a matrix fashion, and then route the connections through the matrix. The final output of the "place & route" process comprises a data-base representing the various layers and polygons in GDS-II format that represent the different mask-layers of the actual chip.
Finally, designers can also take the "full-custom" route in implementing an ASIC. In this case, an individual description of each transistor occurs in building the circuit. A "full-custom" implementation may function five times faster than a "standard-cell" implementation. The "standard-cell" implementation can usually be implemented quite a bit quicker and with less risk of errors, than the "full-custom" choice.
As feature sizes have shrunk and design tools improved over the years, the maximum complexity (and hence functionality) has increased from 5000 gates to 20 million or more. Modern ASICs often include 32-bit processors and other large building-blocks. Many people refer to such an ASIC as a SoC - System on a Chip.
The use of intellectual propertyIn law, intellectual property is a form of legal entitlement which allows its holder to control the use of certain intangible ideas and expressions. The term intellectual property reflects the fact that once established, such entitlements are generally tr (IP) in ASICs has become a growing trend. Many ASIC houses have had standard cell libraries for years. However IP takes the reuse of designs to a new level. Designers of most complex digital ICs now utilise computer languages that describe electronics rather than code. Many organizations now sell tested functional blocks written in these languages. For example, one can purchase CPUThe central processing unit (CPU is the part of a computer that interprets and carries out the instructions contained in the software. In most CPUs, this task is divided between a control unit that directs program flow and one or more execution units thats, ethernetEthernet is a packet-based computer networking technology for local area networks (LANs). It defines wiring and signaling for the physical layer, and packet formats and protocols for the media access control (MAC)/ data link layer of the OSI model. Ethern or telephone interfaces.
For smaller designs and/or lower production volumes, ASICs have started to become a less attractive solution, as field-programmable gate arraysA programmable logic device or PLD is an electronic component used to build digital circuits. Unlike a logic gate, which has a fixed function, a PLD has an undefined function at the time of manufacture. Before the PLD can be used in a circuit it must be p ( FPGAs) grow larger, faster and more capable. Some SoCs consist of a microprocessor, various types of memory and a large FPGA.
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