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The Cyrix 6x86 is a sixth-generation, 32-bit 80x86-compatible microprocessor designed by Cyrix and manufactured by IBM and SGS-Thomson. The 6x86 combines aspects of both RISC and CISC. It has a superscalar, superpipelined core, and performs register renaming, speculative execution, out-of-order completion , and data dependency removal . It has a 16- kilobyte primary cache and is socket-compatible with the Intel Pentium P54C . It was also unique in that it was the only x86 design to incorporate a 256-byte Level 0 scratchpad cache. It has six performance levels: PR 90+, PR 120+, PR 133+, PR 150+, PR 166+ and PR 200+.

The architecture of the 6x86 is more advanced than that of the Intel Pentium, incorporating some of the features of the Intel Pentium Pro. At a given clock rate it executes most code more quickly than a Pentium would. However, its FPU is considerably less efficient than Intel's.

A later release of the 6x86, the 6x86MX, added MMXMMX is a SIMD instruction set designed by Intel, introduced in their Pentium MMX microprocessors. It developed out of a similar unit first introduced on the Intel i860. It has been supported on most subsequent IA-32 processors by Intel and other vendors. compatibility and quadrupled the primary cache size to 64 kilobytes.

This article was originally based on material from the Free On-line Dictionary of Computing, which is used under the GFDL.

Cyrix 686

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