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The first version, code named Merced, shipped in June 2001. Manufactured in a 180 nm process, it was offered at speeds of 733 and 800MHz, with a choice of 2MB or 4MB off-die L3 cache. Prices ranged from US$1200 to over US$4000. However, performance was disappointing. In IA-64 mode, it performed only slightly better than an equivalently clocked x86 design, and when running x86 code, performance was extremely poor, about 1/8th that of an similarly clocked x86 processor.

The main (though by no means only) problem with the Itanium was that the latency of its third-level cache was extremely high, which resulted in the amount of usable bandwidth being greatly reduced.

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Topics: Itanium X86 Ia-64 Code Cache Extremely Clocked Performance...

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ItaniumIn computing, the Itanium is an IA-64 microprocessor developed jointly by Hewlett-Packard and Intel. The first version, code named Merced shipped in June 2001. Manufactured in a 180 nm process, it was offered at speeds of 733 and 800MHz, with a choice of Itanium 2The Itanium 2 is an IA-64 architecture microprocessor developed jointly by Hewlett-Packard and Intel, introduced on July 8, 2002. It put the architecture back on track and obtained leadership performance in many benchmarks. All Itanium 2 processors to dat